1) We can optimize a data path of FSMD by :
A) Sharing a single functional unit, in case the same operation occurs in different states.
B) Implementing a shared ALU system among operations occurring in different states.
C) Both A and B
D) None of these
solution) C) Both A and B
2) FPGAs can be used for implementing
A. Hardware Security Modules (HSM)
B. High Frequency Trading (HFT) systems
C. Both A and B
D. None of the above
solution) c) Both A and B
3) The interconnectivity among the circuital elements of an FPGA is established using
A. Fuse
B. Antifuse
C. SRAM
D. Both B and C
Solution) D) Both B and C
4) Suppose i want to use a single FPGA board to perform two sets of mathematical operations one after the other.What kind of interconnectivity will be suitable?
A. Antifuse FPGA
B. SRAM-based FGPA
C. Both A and B
D. None of these
solution) B) SRAM-based FPGA
5) The inputs of any Programmable Logic Device is fed through
A. OR gates
B. NOR gates
C. AND gates
D. NAND gates
solution) c) AND gates
6) The Configurable Logic Blocks on a FPGA comprise
A. XOR gate, transistor, decoder
B. Johnson counter, transistor, half adder
C. Flip Flop, LUT, Multiplexer
D. None of these
Solution) c) Flip flop, LUT, Multiplexer
7) Which of the following is a library in VHDL?
A. IEEE
B. std_logic_1164
C. numeric_std
D.None of these
Solution) A) IEEE
8) What type of FPGA is preferred for designing aerospace devices?
A. Antifuse FPGA
B. SRAM-based FGPA
C. Both A and B
D. None of these
Solution) A. Antifuse FPGA
9) Reducing the size of CLBs will lead to
A. Increase in area of FPGA
B. Decrease in propagation delay of FPGA
C. Both A and B
D. None of these
Solution) C. Both A and B
10) In VHDL, port description is given by
A. Identifier
B. Mode
C. Data type
D. All of the above
Solution) D. All of the above
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